Huawei is pioneering a new model of innovation under pressure—one that turns chip sanctions into a catalyst for architectural breakthroughs. In Shenzhen, China, the telecom and consumer electronics giant has been forced to completely rethink its approach to chip design after US export controls cut off access to advanced EUV lithography and cutting-edge foundries.
The restrictions, first imposed in 2019 and tightened repeatedly since, left Huawei unable to buy chips from TSMC or license ARMv9. Yet contrary to expectations, the company has not only survived but thrived. Its Mate 60 Pro, launched in 2023, stunned the industry with a 7nm Kirin 9010 chip manufactured by SMIC using deep ultraviolet (DUV) lithography—a feat many deemed impossible. That phone sold over 20 million units in its first year.
Why now? The US-China tech war is escalating. In 2025, Washington expanded sanctions to cover more advanced memory and AI chips. Huawei's response has been to double down on chiplet architecture: breaking monolithic dies into smaller, specialized tiles that can be manufactured on older nodes and then assembled using advanced packaging techniques like 3D stacking and interposers. This is not just a workaround—it is a fundamentally different philosophy of chip design.
Key figures: Huawei invested over $20 billion in semiconductor R&D between 2020 and 2025. Its latest processor, the Kirin 9100, uses a chiplet design that combines a 7nm CPU core with a 5nm-class NPU built via SMIC's N+2 process. Performance gains: 40% improvement in AI inference over the previous generation. The company also filed 4,200 patent applications related to advanced packaging in 2025 alone, a 150% increase from 2022. Analysts at IDC estimate Huawei will ship 50 million smartphones in 2026, nearly back to its pre-sanctions peak.
Industry observers say Huawei's strategy is reshaping the global semiconductor landscape. "They've shown that innovation isn't about having the smallest transistor—it's about system-level optimization," says Willy Shih, a Harvard Business School professor who studies supply chains. "Huawei is forcing other firms to rethink how they design chips." The approach also reduces vulnerability: by using multiple sources for chiplets (including domestic Chinese foundries and even legacy fabs in Europe), Huawei avoids single-point-of-failure dependencies.
What comes next? Huawei aims to achieve performance equivalent to a 3nm chip by 2028 using a combination of 7nm chiplets and advanced packaging. The company is also investing in quantum-dot and photonic computing for future AI accelerators. However, challenges remain: power efficiency still lags behind TSMC's N3 process, and the ecosystem for chiplet standards (like UCIe) is still immature. The broader signal is clear: under pressure, Huawei has unlocked a new playbook for innovation—one that relies on architecture, integration, and resilience rather than sheer process shrinks. The rest of the industry is watching closely.
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What Huawei's Chip Strategy Reveals About Innovation Under Pressure
Faced with restrictions on advanced technologies, Huawei has been forced to rethink how to raise performance.
Mark Greeven, Contributor
Forbes
3 min read
7/10
Key Takeaways
- Huawei invested over $20 billion in semiconductor R&D from 2020 to 2025, focusing on chiplet architecture and advanced packaging.
- The Kirin 9100 chip, launched in 2025, uses a chiplet design combining 7nm CPU cores with a 5nm-class NPU via SMIC's N+2 process, achieving 40% higher AI inference performance.
- Patent filings by Huawei for advanced packaging technologies surged 150% between 2022 and 2025, reaching 4,200 applications.
- The Mate 70 series, powered by the Kirin 9100, sold 5 million units in its first month of release in late 2025.
- Huawei targets 3nm-equivalent performance by 2028 using only mature-node chiplets and advanced 3D stacking, bypassing the need for EUV lithography.
Frequently Asked Questions
Huawei's chip strategy focuses on chiplet architecture and advanced packaging to overcome US sanctions. Instead of relying on cutting-edge fabrication nodes, the company breaks chips into smaller dies that can be built on older, accessible foundries and then stacked or interconnected for high performance.
Huawei partners with SMIC, China's largest foundry, which uses DUV lithography to produce 7nm and 5nm-class chips. By using chiplet designs, Huawei maximizes the performance of these older nodes through advanced packaging techniques like 3D stacking and silicon interposers.
Chiplet technology involves breaking a large monolithic processor into smaller, specialized dies (chiplets) that are manufactured separately and then integrated using advanced packaging. This approach allows using different process nodes for different functions and improves yield and flexibility.
US sanctions restrict Huawei's access to advanced semiconductor manufacturing tools, design software, and foundries like TSMC. These restrictions aim to slow China's technological progress but also forced Huawei to innovate in chip architecture, potentially reshaping global semiconductor competition.
As of 2026, Huawei's most advanced chip is the Kirin 9100, which combines a 7nm CPU chiplet with a 5nm-class NPU chiplet. It delivers significant AI performance improvements and is used in the Mate 70 series smartphones.
Huawei aims to achieve 3nm-equivalent performance by 2028 using chiplets manufactured on 7nm and 5nm-class nodes combined with advanced 3D packaging. While not a true 3nm process, the system-level performance may rival EUV-based chips in specific workloads.
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